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Low Skew,1-to-4,Differential-to-LVDS Fanout Buffer

封装信息

CAD 模型: View CAD Model
Pkg. Type: TSSOP
Pkg. Code: PGG16
Lead Count (#): 16
Pkg. Dimensions (mm): 5.0 x 4.4 x 1.0
Pitch (mm): 0.65

环境和出口类别

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

产品属性

Lead Count (#) 16
Carrier Type Reel
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 2500
Qty. per Carrier (#) 0
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Additive Phase Jitter Typ RMS (fs) 232
Additive Phase Jitter Typ RMS (ps) 0.232
Core Voltage (V) 3.3
Function Buffer
Input Freq (MHz) 700
Input Type HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#) 1
Length (mm) 5
MOQ 2500
Output Banks (#) 1
Output Freq Range (MHz) 700
Output Skew (ps) 50
Output Type LVDS
Output Voltage (V) 3.3
Outputs (#) 4
Package Area (mm²) 22
Pitch (mm) 0.65
Pkg. Dimensions (mm) 5.0 x 4.4 x 1.0
Pkg. Type TSSOP
Reel Size (in) 13
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel Yes
Thickness (mm) 1
Width (mm) 4.4
已发布 No

描述

The 854104 is a low skew, high performance 1-to-4 Differential-to-LVDS Clock Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. Utilizing Low Voltage Differential Signaling (LVDS), the 854104 provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100?. The 854104 accepts a differential input level and translates it to LVDS output levels. Guaranteed output and part-to-part skew characteristics make the 854104 ideal for those applications demanding well defined performance and repeatability.