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Low Skew, 1-to-5 HSTL Zero Delay Buffer

封装信息

Pkg. Type: TQFP
Pkg. Code: PRG32
Lead Count (#): 32
Pkg. Dimensions (mm): 7.0 x 7.0 x 1.4
Pitch (mm): 0.8

环境和出口类别

Pb (Lead) Free Yes
Moisture Sensitivity Level (MSL) 3
ECCN (US)
HTS (US)

产品属性

Pkg. Type TQFP
Lead Count (#) 32
Pb (Lead) Free Yes
Carrier Type Tray
C-C Jitter Max P-P (ps) 25
Core Voltage (V) 3.3
Divider Value 4, 8
Input Freq (MHz) 31.25 - 700
Input Type LVPECL, LVDS, HSTL, SSTL, HCSL
Inputs (#) 2
Length (mm) 7
MOQ 250
Moisture Sensitivity Level (MSL) 3
Output Banks (#) 1
Output Freq Range (MHz) 31.25 - 700
Output Signaling HSTL
Output Skew (ps) 25
Output Type HSTL
Output Voltage (V) 1.8
Outputs (#) 4
Package Area (mm²) 49
Pb Free Category e3 Sn
Pitch (mm) 0.8
Pkg. Dimensions (mm) 7.0 x 7.0 x 1.4
Qty. per Carrier (#) 250
Qty. per Reel (#) 0
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1.4
VCO Max Freq (MHz) 700
VCO Min Freq (MHz) 250
Width (mm) 7
已发布 No

描述

The 8624 is a high performance, 1-to-5 Differential-to-HSTL zero delay buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The 8624 has two selectable clock input pairs. The CLK0, nCLK0 and CLK1, nCLK1 pair can accept most standard differential input levels. The VCO operates at a frequency range of 250MHz to 700MHz. Utilizing one of the outputs as feedback to the PLL, output frequencies up to 700MHz can be regenerated with zero delay with respect to the input. Dual reference clock inputs support redundant clock or multiple reference applications.