封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 6.5 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
环境和出口类别
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | TSSOP |
| Lead Count (#) | 20 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| Advanced Features | Spread Spectrum |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2 |
| C-C Jitter Max P-P (ps) | 35 |
| Core Voltage (V) | 3.3 |
| Feedback Input | No |
| Input Freq (MHz) | 98 - 128 |
| Input Type | LVDS, LVPECL, LVHSTL, SSTL, HCSL |
| Inputs (#) | 1 |
| Length (mm) | 6.5 |
| MOQ | 3000 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 98 - 320 |
| Output Skew (ps) | 145 |
| Output Type | LVDS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 3 |
| Package Area (mm²) | 28.6 |
| Pb Free Category | e3 Sn |
| Phase Jitter Typ RMS (ps) | 0.22 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 6.5 x 4.4 x 1.0 |
| Prog. Clock | No |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 3000 |
| Reel Size (in) | 13 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
| 已发布 | No |
有关 874003-05 的资源
描述
The 874003-05 is a high performance Differential-to-LVDS Jitter Attenuator designed for use in PCI Express® systems. In some PCI Express® systems, such as those found in desktop PCs, the PCI Express® clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The 874003-05 has a bandwidth of 6.2MHz with <1dB peaking, easily meeting PCI Express® Gen2 PLL requirements. The 874003-05 uses IDT's 3rd Generation FemtoClock® PLL technology to achieve the lowest possible phase noise. The device is packaged in a 20 Lead TSSOP package, making it ideal for use in space constrained applications such as PCI Express® add-in cards.