概览
描述
Provides 48 PCIe Gen3 lanes and 12 ports of high-performance, deterministic system interconnect switching. All ports receive full line rate, non-blocking throughput for multiple traffic flows regardless of switch loading.
特性
- 48 PCIe Gen3 Lanes, 12 Switch Ports
- Non-blocking switch architecture optimized for High Performance System Interconnect
- Partionable switch architecture for true multi-root support
- Internal buffering and flow control credits optimized for maximum bandwidth and large payloads
- Low latency, Low power
产品对比
应用
文档
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类型 | 文档标题 | 日期 |
数据手册 | PDF 368 KB | |
EOL 通告 | PDF 720 KB | |
EOL 通告 | PDF 647 KB | |
EOL 通告 | PDF 898 KB | |
器件勘误表 | PDF 61 KB | |
手册 - 硬件 | PDF 2.83 MB | |
产品简述 | PDF 396 KB | |
应用说明 | PDF 351 KB | |
8 项目
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