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1-to-9 Differential-to-3.3V Fanout Buffer

封装信息

CAD 模型:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG32
Lead Count (#):32
Pkg. Dimensions (mm):5.0 x 5.0 x 0.9
Pitch (mm):0.5

环境和出口类别

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)32
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)2500
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Core Voltage (V)3.3
Divider Value1
FunctionBuffer, Multiplexer
Input Freq (MHz)500
Input TypeLVPECL, LVDS, HSTL, SSTL, HCSL
Inputs (#)2
Length (mm)5
MOQ2500
Output Banks (#)1
Output Freq Range (MHz)500
Output SignalingLVPECL
Output Skew (ps)40
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)9
Package Area (mm²)25
Pitch (mm)0.5
Pkg. Dimensions (mm)5.0 x 5.0 x 0.9
Pkg. TypeVFQFPN
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)0.9
Width (mm)5
已发布No

描述

The 8EN31AK is a low skew, high performance 1-to-9 Differential-to-3.3V LVPECL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8EN31AK has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output skew and part-to-part skew characteristics make the 8EN31AK ideal for high performance workstation and server applications.