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Dual 1:8 LVDS 1.8V / 2.5V Fanout Buffer for 1PPS and High-Speed Clocks

封装信息

CAD 模型:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG48
Lead Count (#):48
Pkg. Dimensions (mm):7.0 x 7.0 x 0.9
Pitch (mm):0.5

环境和出口类别

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)48
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)2000
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C (Tc ≤ 105°C)
Country of AssemblyTAIWAN
Country of Wafer FabricationSINGAPORE
105°C Max. Case Temp.1
Additive Phase Jitter Typ RMS (fs)45
Additive Phase Jitter Typ RMS (ps)0.045
Adjustable PhaseNo
Advanced FeaturesDual Buffer, Output Amplitude Control
Channels (#)2
Core Voltage (V)1.8
Family Name8P34S
FunctionBuffer
Input Freq (MHz)2000
Input TypeLVPECL, LVDS, LVCMOS
Inputs (#)2
Length (mm)7
Longevity2040 4月
MOQ2000
Noise Floor (dBc/Hz)-160
Output Banks (#)2
Output Freq Range (MHz)2000
Output Skew (ps)40
Output TypeLVDS
Output Voltage (V)1.8V, 2.5V
Outputs (#)16
Package Area (mm²)49
Pitch (mm)0.5
Pkg. Dimensions (mm)7.0 x 7.0 x 0.9
Pkg. TypeVFQFPN
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Supply Voltage (V)1.8 - 1.8
Tape & ReelYes
Thickness (mm)0.9
Width (mm)7
已发布No

描述

The 8P34S2108 is a high-performance, low-power, differential dual 1:6 LVDS output 1.8V/2.5V fanout buffer. The device supports fail-safe operation and is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. Two independent buffer channels are available, each channel has eight low skew outputs. High isolation between channels minimizes noise coupling. AC characteristics such as propagation delay are matched between channels. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S2108 ideal for those clock distribution applications demanding well-defined performance and repeatability. The device is characterized to operate from a 1.8V/2.5V power supply. The integrated bias voltage references enable easy interfacing of AC-coupled signals to the device inputs.