封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG40 |
| Lead Count (#): | 40 |
| Pkg. Dimensions (mm): | 6.0 x 6.0 x 0.9 |
| Pitch (mm): | 0.5 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
产品属性
| Lead Count (#) | 40 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Advanced Features | Programmable Clock |
| Core Voltage (V) | 3.3V, 2.5V |
| Divider Value | 2 |
| Family Name | FemtoClock NG |
| Feedback Divider | 16 - 250 |
| Feedback Input | No |
| Input Freq (MHz) | 10 - 312.5 |
| Input Type | Crystal, LVPECL, LVDS, HCSL |
| Inputs (#) | 2 |
| Length (mm) | 6 |
| MOQ | 490 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 15.16 - 1250 |
| Output Signaling | LVPECL, LVDS |
| Output Skew (ps) | 50 |
| Output Type | LVPECL, LVDS |
| Output Voltage (V) | 3.3V, 2.5V |
| Outputs (#) | 8 |
| Package Area (mm²) | 36 |
| Period Jitter Max P-P (ps) | 8.3 |
| Period Jitter Typ P-P (ps) | 0.78 |
| Phase Jitter Max RMS (ps) | 0.292 |
| Phase Jitter Typ RMS (fs) | 212 |
| Phase Jitter Typ RMS (ps) | 0.212 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 6.0 x 6.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Prog. Clock | Yes |
| Prog. Interface | I2C |
| Qty. per Carrier (#) | 490 |
| Qty. per Reel (#) | 0 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | No |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| VCO Max Freq (MHz) | 2500 |
| VCO Min Freq (MHz) | 1910 |
| Width (mm) | 6 |
| Xtal Freq (KHz) | 10 - 40 |
| Xtal Inputs (#) | 1 |
| 已发布 | No |
有关 8T49N008I 的资源
描述
The 8T49N008I is an eight output Clock Generator with selectable LVDS or LVPECL outputs. The 8T49N008I can generate any one of four frequencies from a single crystal or reference clock. The four frequencies are selected from the Frequency Selection Table (Table 3) and are programmed via I2C interface. The four predefined frequencies are selected in the user application by two frequency selection pins. Note the desired programmed frequencies must be used with the corresponding crystal as indicated in Table 3. Excellent phase noise performance is maintained with Renesas' 4TH Generation FemtoClock™ NG PLL technology, which delivers sub-0.5ps RMS phase jitter.