瑞萨电子 (Renesas Electronics Corporation)
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8T49N282

有效

FemtoClock NG Dual Universal Frequency Translator (4-in/2-PLL/8-out)

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特性

  • Two differential outputs meet jitter limits for 100G Ethernet and STM-256/OC-768
    • <0.3ps RMS (including spurs): 12kHz to 20MHz
  • Accepts up to four LVPECL, LVDS, LVHSTL, HCSL, or LVCMOS input clocks ranging from 8kHz up to 875MHz
    • ​Auto and manual input clock selection with hitless switching
    • Clock input monitoring, including support for gapped clocks
  • ​Phase-Slope Limiting and Fully Hitless Switching options to control output phase transients
  • Operates from a 10MHz to 40MHz fundamental-mode crystal
  • Generates eight LVPECL/LVDS or 16 LVCMOS output clocks ranging from 8kHz up to 1.0GHz (diff), 8kHz to 250MHz (LVCMOS)
  • Register programmable through I2C/SPI or via external I2C EEPROM
  • Supported by Renesas' Timing Commander™ software
查找带频率转换的抖动衰减器的其他产品
8T49N282i-Block Diagram

描述

The 8T49N282I has two independent, fractional-feedback PLLs that can be used as jitter attenuators and frequency translators. It is equipped with six integer and two fractional output dividers, allowing the generation of up to eight different output frequencies, ranging from 8kHz to 1GHz. Four of these frequencies are completely independent of each other and the inputs. The other four are related frequencies. The eight outputs may select among LVPECL, LVDS, or LVCMOS output levels.

Renesas' third-generation Universal Frequency Translator family also includes the 8T49N281i (2-in/1-PLL/8-out) and the 8T49N283i (2-in/2-PLL/8-out).

To see other devices in this product family, visit the Universal Frequency Translators page.

产品参数

属性 值
Inputs (#) 4
Input Type LVCMOS, LVTTL, HCSL, LVHSTL, LVDS, LVPECL
Product Category FemtoClock NG
Diff. Outputs 8
Output Type LVCMOS, LVDS, LVPECL
Output Voltage (V) 2.5V, 3.3V
Input Freq (MHz) 0.008 - 875
Phase Jitter Typ RMS (ps) 0.26, 0.28
Output Freq Range (MHz) 0.008 - 1000
Fractional Output Dividers (#) 2
Core Voltage (V) 2.5V, 3.3V
Output Banks (#) 4
Loop Bandwidth Range (Hz) 0.25 - 512
Xtal Freq (KHz) 10000 - 40000
Advanced Features Programmable Clock, Programmable Hitless Reference Switching, Fractional-N PLL, External Feedback

封装选项

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
VFQFPN 10.0 x 10.0 x 1.0 72 0.5

应用

  • OTN or SONET/SDH equipment line cards (up to OC-192, and supporting FEC ratios)
  • OTN de-mapping (Gapped Clock and DCO mode)
  • Gigabit and Terabit IP switches/routers including support of Synchronous Ethernet
  • Wireless base station baseband
  • Data communications

当前筛选条件

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Description

Overview of IDT's third generation Universal Frequency Translator (UFT) family of timing devices for high-performance optical networks, wireless base stations, and 100 Gigabit Ethernet (GbE) interface applications. The new UFT devices are the industry's only single-chip programmable solutions capable of generating eight different output frequencies with less than 300 femtoseconds RMS phase jitter over the standard 12 kHz to 20 MHz integration range.
 
The IDT 8T49N28x UFT family of timing devices offers eight independently programmable clocking outputs with the flexibility to apply virtually any input frequency and select virtually any output frequency. The devices' high level of integration and low jitter eliminates the need for separate frequency translation, redundancy management, and jitter attenuation devices -- empowering system designers to save cost and board area by consolidating those functions into a single device. In addition, the device offers significant flexibility in configuration and ease of programmability with IDT's Timing Commander software, making it useful in a variety of sockets and modes of operation with minimal design effort.
 
Presented by Ian Dobson, Director of System Architecture at IDT. Visit the Universal Frequency Translators page for information.
 

新闻和博客

博客
2021年4月27日
Benefits of a Point-of-Use Clock for Jitter Optimization
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