特性
- Digital PLL synchronizes with Ethernet connected synchronization sources
- DPLL bandwidth is 1.2 Hz; DPLL holdover accuracy is 1.1X10-5 ppm
- Input references are monitored for frequency offset and activity
- DPLL holdover, free run and hitless reference switching can be forced by the host processor or can be automatically controlled by an internal state machine
- Internal DCO has resolution of 0.01105 ppb and can be controlled by an external processor via I2C interface for IEEE 1588 clock generation
- One Analog PLL for jitter attenuation
- Jitter generation <0.65ps RMS (10 kHz to 20 MHz), meets jitter requirements of 1 GbE PHYs and QSGMII
- IN1, IN2 and IN3 accept single ended reference clocks whose frequencies can be 25 MHz, 125 MHz or 156.25 MHz
- OUT1 outputs a differential clock with frequency of 125 MHz or 156.25 MHz
- OUT2 to OUT6 output differential clocks all with the same frequency of 125 MHz or 156.25 MHz
- OUT7 outputs a free-running LVCMOS clock with frequency of 25 MHz
8V89316 Functional Diagram
描述
The IDT8V89316 is used to frequency synchronize equipment with an Ethernet connected reference; its integrated DCO (Digitally Controlled Oscillator) can be controlled by an external IEEE 1588 clock recovery servo to synthesize IEEE 1588-based clocks. The IDT8V89316 low jitter output clocks can be used to directly time Gigabit Ethernet PHYs and QSGMII devices.
Renesas Boards & Kits
8EBV89316
有效
Evaluation Board 8EBV89316 for Industrial Automation and Power Systems - Ethernet PLL and IEEE 1588 Synthesizer
The 8EBV89316 Evaluation board for Industrial Automation and Power Systems allows the user to connect up to three single ended reference inputs via SMA connectors. The inputs can operate at 25MHz, 125MHz, or 156.25MHz. Synchronization functions are provided by the 8V89316 Digital PLL (DPLL)... 阅读详情
