Lead Count (#) | 24 |
Pkg. Code | NLG24 |
Pitch (mm) | 0.5 |
Pkg. Type | VFQFPN |
Pkg. Dimensions (mm) | 4.0 x 4.0 x 0.9 |
Moisture Sensitivity Level (MSL) | 1 |
Pb (Lead) Free | Yes |
ECCN (US) | NLR |
HTS (US) | 8542390060 |
Lead Count (#) | 24 |
Carrier Type | Reel |
Moisture Sensitivity Level (MSL) | 1 |
App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6 |
Qty. per Reel (#) | 2500 |
Qty. per Carrier (#) | 0 |
Pb (Lead) Free | Yes |
Pb Free Category | e3 Sn |
Temp. Range | -40 to 85°C |
Country of Assembly | Taiwan |
Country of Wafer Fabrication | Taiwan |
Accepts Spread Spec Input | Yes |
Additive Phase Jitter Typ RMS (fs) | 300 |
Additive Phase Jitter Typ RMS (ps) | 0.3 |
Advanced Features | Multiple SMBus addresses |
Architecture | Common, SRNS, SRIS |
C-C Jitter Max P-P (ps) | 50 |
Core Voltage (V) | 3.3 |
Diff. Input Signaling | HCSL |
Diff. Inputs | 1 |
Diff. Output Signaling | LP-HCSL |
Diff. Outputs | 2 |
Diff. Termination Resistors | 0 |
Feedback Input | No |
Function | Zero Delay Buffer |
Input Freq (MHz) | 1 - 200 |
Input Type | HCSL |
Inputs (#) | 1 |
Length (mm) | 4 |
Longevity | 2040 4月 |
MOQ | 2500 |
NXP Processor Function | SerDes Clock |
Output Banks (#) | 1 |
Output Freq Range (MHz) | 1 - 200 |
Output Impedance | 100 |
Output Skew (ps) | 50 |
Output Type | LP-HCSL |
Output Voltage (V) | 0.8 |
Outputs (#) | 2 |
PLL | Yes |
Package Area (mm²) | 16.0 |
Pitch (mm) | 0.5 |
Pkg. Dimensions (mm) | 4.0 x 4.0 x 0.9 |
Pkg. Type | VFQFPN |
Power Consumption Typ (mW) | 100 |
Prog. Clock | No |
Reel Size (in) | 13 |
Reference Output | No |
Spread Spectrum | Yes |
Supply Voltage (V) | 3.3 - 3.3 |
Tape & Reel | Yes |
Thickness (mm) | 0.9 |
Width (mm) | 4 |
The 9DBL0242 2-output zero-delay/fanout buffer is a 3.3V member of Renesas' full-featured PCIe family. The 9DBL0242 supports PCIe Gen 1 through Gen 6 and both Common and Independent Reference Clock architectures.
For information regarding evaluation boards and material, please contact your local sales representative.