特性
- 4- 0.7V current-mode differential output pairs
- Supports Spread Injection mode and fanout mode
- Two pin selectable down spread amounts: 0.5% and 0.25%
- 50-110 MHz operation in PLL mode
- 50-400 MHz operation in Bypass mode
- Bypass mode
- Supports undriven differential outputs in PD# and SRC_STOP# modes for power management
- Output cycle-cycle jitter < 50ps
- Output to Output skew <50ps
- Phase jitter: PCIe Gen1 < 86ps peak to peak
- Phase jitter: PCIe Gen2 < 3.0/3.1ps rms
描述
The 9DS400 is a 4-output PCIe PLL with the ability to inject spread spectrum onto the incoming differential clock, while maintaining good phase noise.