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瑞萨电子 (Renesas Electronics Corporation)

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数据手册、文档以及样品订购仍将通过 Renesas.com 官网提供,直至 2026 年底。如需新设计、采购、技术支持以及产品咨询,请访问 SiTime.com 官网或发送电子邮件至 [email protected]。预计于 2026 年底前全面过渡至 SiTime。

12-Output DB1200ZL PCIe Zero-Delay/Fanout Clock Buffer

封装信息

CAD 模型:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG64
Lead Count (#):64
Pkg. Dimensions (mm):9.0 x 9.0 x 0.9
Pitch (mm):0.5

环境和出口类别

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)64
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)207
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Country of AssemblyTAIWAN
Country of Wafer FabricationTAIWAN
Accepts Spread Spec InputYes
Advanced FeaturesSW PLL mode control
App Jitter CompliancePCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, QPI, UPI, 25G EDR, IF-UPI, PCIe Gen5, DB2000Q
ArchitectureCommon, SRIS, SRNS
C-C Jitter Max P-P (ps)50
Chipset ManufacturerIntel
Chipset NameC600, Patsburg, Wellsburg, Lewisburg
Clock Spec.DB1200ZL v0.8
Core Voltage (V)3.3V
Diff. Input SignalingHCSL
Diff. Inputs1
Diff. Output SignalingLP-HCSL
Diff. Outputs12
Diff. Termination Resistors24
Feedback InputNo
FunctionZero Delay Buffer
Input Freq (MHz)33 - 150
Input TypeHCSL
Inputs (#)1
Lead CompliantNo
Length (mm)9
MOQ207
Output Banks (#)1
Output Enable (OE) Pins12
Output Freq Range (MHz)1 - 400
Output Impedance33
Output Skew (ps)50
Output TypeLP-HCSL
Output Voltage (V)0.7V
Outputs (#)12
PLLYes
Package Area (mm²)81
Pitch (mm)0.5
Pkg. Dimensions (mm)9.0 x 9.0 x 0.9
Pkg. TypeVFQFPN
Power Consumption Typ (mW)481
Product CategoryPCI Express Clocks, Processor Clock Buffers, Zero Delay Buffers
Prog. ClockYes
Prog. InterfaceSMBUS
Reference OutputNo
Spread SpectrumYes
Supply Voltage (V)3.3 - 3.3
Tape & ReelNo
Thickness (mm)0.9
Width (mm)9

描述

The 9ZXL1231E is a second-generation, enhanced-performance DB1200ZL differential buffer. The part is a pin-compatible upgrade to the 9ZXL1231A while offering much-improved phase jitter performance and increased system security features. A fixed external feedback maintains low drift for critical QPI/UPI applications.