特性
- CMOS or LVDS DDR digital outputs
- Dual-channel14-bit pipelined ADC core
- Duty cycle stabilizer
- Fast OTR detection
- Flexible input voltage range: 1 V to 2 V (p-p) with 6 dB programmable fine
- gain
- INL ±
- 1 LSB, DNL ±
- 0.5 LSB (typical)
- Input bandwidth, 650 MHz
- Offset binary, 2's complement, gray code
- Power dissipation, 775 mW at 80 Msps
- Power-down and Sleep modes
- Sample rate up to 65 Msps
- SFDR, 90 dBc
- Single 3 V supply
- SNR, 73 dB
- SPI Interface
ADC1412D065HN - Block Diagram
描述
The ADC1412D065HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 65 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage Differential Signaling) DDR (Double Data Rate) output standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. The device also includes a programmable gain amplifier with a flexible input voltage range.
