封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG64 |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 9.0 x 9.0 x 0.9 |
| Pitch (mm): | 0.5 |
环境和出口类别
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | VFQFPN |
| Lead Count (#) | 64 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tray |
| Channels (#) | 2 |
| Length (mm) | 9 |
| MOQ | 260 |
| Moisture Sensitivity Level (MSL) | 3 |
| Package Area (mm²) | 81 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 9.0 x 9.0 x 0.9 |
| Power Consumption Typ (mW) | 975 |
| Qty. per Carrier (#) | 260 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Resolution (bits) | 14 |
| Supply Voltage (V) | 1.8 - 1.8, 3.3 - 3.3 |
| Tape & Reel | No |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 0.9 |
| Width (mm) | 9 |
| 已发布 | No |
有关 ADC1412D105HN 的资源
描述
The ADC1412D105HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at sample rates up to 105 Msps. Pipelined architecture and output error correction ensure the ADC1412D is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage Differential Signaling) DDR (Double Data Rate) output standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. The device also includes a programmable gain amplifier with a flexible input voltage range.