特性
- Leverages high-speed serial technology for DRAM interface
- Supports 3.2, 4.0 and 4.8 Gbits serial speeds (DDR2-533/667)
- Support for 14 northbound lanes (read) and 10 southbound lanes (write)
- Support for up to 8 DIMMs per channel
描述
JEDEC compliant Advanced Memory Buffer for Fully buffered DIMMs. 3.2, and 4.0 Gb/s serial speeds (DDR2-533, and 667 DRAM). Support for up to eight DIMMs per channel.
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