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瑞萨电子 (Renesas Electronics Corporation)
CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

封装信息

CAD 模型:View CAD Model
Pkg. Type:CFP
Pkg. Code:KBG
Lead Count (#):16
Pkg. Dimensions (mm):10.4 x 6.9 x 0.00
Pitch (mm):1.3

环境和出口类别

Moisture Sensitivity Level (MSL)Not Applicable
Pb (Lead) FreeExempt
ECCN (US)
HTS (US)

产品属性

Pkg. TypeCFP
Lead Count (#)16
Carrier TypeTray
Moisture Sensitivity Level (MSL)Not Applicable
Pitch (mm)1.3
Pkg. Dimensions (mm)10.4 x 6.9 x 0.00
DLA SMD5962R9662401VXC
Pb (Lead) FreeExempt
Pb Free CategoryGold Plate over compliant Undercoat-e4
MOQ25
Temp. Range (°C)-55 to +125°C
DSEE (MeV·cm2/mg)75
Length (mm)10.4
Qualification LevelQML Class V (space)
RatingSpace
TID HDR (krad(Si))100
TID LDR (krad(Si))ELDRS free
Width (mm)6.9

描述

CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. Q outputs are available from each of the four stages on both registers. All register stages are D type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015BMS package, or to more than 8 stages using additional CD4015BMS's is possible. The CD4015BMS is supplied in these 16 lead outline packages: Braze Seal DIP H4X Frit Seal DIP H1F Ceramic Flatpack H6W