概览
描述
The CD4042BMS radiation hardened Quad D latch contains four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all outputs are electrically identical.
特性
- High-Voltage Type (20V Rating)
- Clock Polarity Control
- Q and Q Outputs
- Common Clock
- Low Power TTL Compatible
- Standardized Symmetrical Output Characteristics
- 100% Tested for Quiescent Current at 20V
- Maximum Input Current of 1μA at 18V Over Full Package Temperature Range; 100nA at 18V and +25 °C
- 5V, 10V, and 15V Parametric Ratings
- Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
- Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
产品对比
应用
设计和开发
模型
ECAD 模块
点击产品选项表中的 CAD 模型链接，查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用，可直接在 SamacSys 请求该符号或模型。
产品选项
当前筛选条件