概览
描述
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The HI5766 is a monolithic, 10-bit, analog-to-digital converter fabricated in a CMOS process. It is designed for high speed applications where wide bandwidth and low power consumption are essential. Its 60 MSPS speed is made possible by a fully differential pipelined architecture with an internal sample and hold. The HI5766 has excellent dynamic performance while consuming only 260mW power at 60 MSPS. Data output latches are provided which present valid data to the output bus with a latency of 7 clock cycles. It is pin-for-pin functionally compatible with the HI5702, HI5703 and the HI5746. For internal voltage reference, please refer to the HI5767 data sheet.
特性
- Sampling Rate 60 MSPS
- 8.3 Bits at fIN = 10MHz
- Low Power at 60 MSPS 260mW
- Wide Full Power Input Bandwidth 250MHz
- On Chip Sample and Hold
- Fully Differential or Single-Ended Analog Input
- Single Supply Voltage +5V
- TTL/CMOS Compatible Digital Inputs
- CMOS Compatible Digital Outputs 3.0/5.0V
- Offset Binary or Two's Complement Output Format
产品对比
应用
文档
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类型 | 文档标题 | 日期 |
数据手册 | PDF 846 KB | |
宣传手册 | PDF 5.41 MB 日本語 | |
EOL 通告 | PDF 200 KB | |
产品变更通告 | PDF 98 KB | |
手册 - 开发工具 | PDF 201 KB | |
应用说明 | PDF 503 KB | |
应用说明 | PDF 1.08 MB | |
应用说明 | PDF 508 KB | |
应用说明 | PDF 287 KB | |
9 项目
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设计和开发
模型
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