封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | MSOP |
| Pkg. Code: | MQR |
| Lead Count (#): | 8 |
| Pkg. Dimensions (mm): | 0.12 x 0.12 x 0.0 |
| Pitch (mm): | 0.03 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | No |
| ECCN (US) | |
| HTS (US) |
产品属性
| Lead Count (#) | 8 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Pitch (mm) | 0.7 |
| Pkg. Dimensions (mm) | 3.0 x 3.0 x 0.00 |
| Pb (Lead) Free | No |
| Pb Free Category | Solder Plate |
| Temp. Range (°C) | -40 to +85°C |
| Advanced Features | High Speed |
| Data Rate (Mbps) | 40 |
| Devices Allowed on Bus | 50 |
| Half/Full Duplex | Half |
| High ESD Protection | No |
| Hot Plug | No |
| IS Enabled/Disabled | 1000/800 µA |
| Length (mm) | 3 |
| MOQ | 2500 |
| Pkg. Type | MSOP |
| Primary Feature | ESD Protected RS-485/422 |
| Qualification Level | Standard |
| Receivers (#) | 1 |
| SHDN ICC | N/A µA |
| Secondary Feature | High Speed |
| Slew Rate Limited | No |
| Supply Voltage Vcc (Min) (V) | 4.5 |
| Supply Voltage Vcc Range | 4.5-5.5 |
| Transmitters (#) | 1 |
| Tx/Rx Enable | Yes |
| VL Pin | No |
| Width (mm) | 3 |
有关 ISL4486 的资源
描述
Support is limited to customers who have already adopted these products.
The Intersil ISL4486 and ISL81486 are BiCMOS, 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication, and feature the larger output voltage and higher data rate - up to 40Mbps - required by high speed PROFIBUS applications. Unlike competitive products, these Intersil devices are specified for 10% tolerance supplies (4. 5V to 5. 5V) and deliver at least a 2. 3V differential output voltage over this supply range. At the 5% tolerance specified by many competitors, the ISL4486 delivers an unsurpassed 2. 5V differential signal into a 54Ω total load. This translates into longer reach, or better data integrity, at the exceptional 40Mbps data rate. SCSI applications benefit from the ISL4486's low receiver and transmitter part-to-part skews, which make it perfect for high speed parallel applications where large numbers of bits must be simultaneously captured. The low bit-to-bit skew eases the timing constraints on the data latching signal. These devices present a 0. 6 unit load to the RS-485 bus, which allows up to 50 transceivers on the network. Receiver (Rx) inputs feature a fail-safe if open design, which ensures a logic high Rx output if Rx inputs are floating. Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive.