封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | CFP |
| Pkg. Code: | KDA |
| Lead Count (#): | 28 |
| Pkg. Dimensions (mm): | 18.3 x 12.7 x 0.00 |
| Pitch (mm): | 1.3 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | Exempt |
| ECCN (US) | 9A515.e.1 |
| HTS (US) | 8542.39.0090 |
产品属性
| Pkg. Type | CFP |
| Lead Count (#) | 28 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Qualification Level | Class V |
| DLA SMD | 5962R1920901VXC |
| Pb (Lead) Free | Exempt |
| Pb Free Category | Gold Plate over compliant Undercoat-e4 |
| MOQ | 25 |
| Temp. Range (°C) | -55 to +125°C |
| CAGE code | 34371 |
| Control Mode | Voltage Mode |
| Control Type | Voltage Mode |
| DSEE (MeV·cm2/mg) | 86 |
| Die Sale Availability? | Yes |
| Duty Cycle (%) | 85 - 85 |
| Flow | RH Hermetic |
| IOUT Rail 1 (max) (A) | 3 |
| IOUT Rail 2 (max) (A) | 1 |
| IQ [Rail 1] (µA) | 600 |
| IQ [Rail 2] | 450 |
| Input Voltage (Max) [Rail 1] (V) | 5.5 - 5.5 |
| Input Voltage (Max) [Rail 2] (V) | 5.5 - 5.5 |
| Input Voltage (Min) [Rail 1] (V) | 3 |
| Input Voltage (Min) [Rail 2] (V) | 0.775 |
| Length (mm) | 18.3 |
| No-Load Operating Current | 10 |
| Output Current (Max) [Rail 1] (A) | 3 |
| Output Current (Max) [Rail 2] (A) | 1 |
| Output Voltage (Max) [Rail 1] (V) | 4.675 |
| Output Voltage (Max) [Rail 2] (V) | 4 |
| Output Voltage (Min) (V) | 0.6 |
| Output Voltage (Min) [Rail 1] (V) | 0.6 |
| Output Voltage (Min) [Rail 2] (V) | 0.6 |
| Outputs (#) | 2 |
| POR | Yes |
| PROTO Availability? | Yes |
| Peak Efficiency (%) | 94 |
| Pitch (mm) | 1.3 |
| Pkg. Dimensions (mm) | 18.3 x 12.7 x 0.00 |
| Quiescent Current | 0.6mA |
| Rating | Space |
| SYNCH Capability | Yes |
| Supply Voltage Rail 1 (max) (V) | 5.5 |
| Supply Voltage Rail 1 (min) (V) | 3 |
| Supply Voltage Rail 2 (max) (V) | 5.5 |
| Supply Voltage Rail 2 (min) (V) | 1 |
| Switching Frequency (MHz) | 0.1 - 1 |
| Switching Frequency (max) (kHz) | 1000 |
| Switching Frequency (min) (kHz) | 100 |
| TID HDR (krad(Si)) | 100 |
| TID LDR (krad(Si)) | 75 |
| Topology [Rail 1] | Buck |
| Topology [Rail 2] | LDO |
| VOUT Rail 1 (max) (V) | 4.675 |
| VOUT Rail 1 (min) (V) | 0.6 |
| VOUT Rail 2 (max) (V) | 5 |
| VOUT Rail 2 (min) (V) | 0.6 |
| Width (mm) | 12.7 |
有关 ISL70005SEH 的资源
描述
The ISL70005SEH is radiation hardened dual output Point-of-Load (POL) regulator combining the high efficiency of a synchronous buck regulator with the low noise of a Low Dropout (LDO) regulator. They are suited for systems with 3.3V or 5V power buses and can support continuous output load currents of 3A for the buck regulator and ±1A for the LDO. The buck regulator uses a voltage mode control architecture and switches at a resistor adjustable frequency of 100kHz to 1MHz. Externally adjustable loop compensation allows for an optimum balance between stability and output dynamic performance. The internal synchronous power switches are optimized for high efficiency and excellent thermal performance. The LDO is completely configurable independent of the switching regulator. It uses NMOS pass devices and separate chip bias voltage (L_VCC) to drive its gate, enabling the LDO to operate with a very low voltage at the L_VIN input. The LDO can sink and source up to 1A continuously, making it an ideal choice to power DDR memory. The ISL70005SEH is available in a space-saving 28 Ld ceramic dual flat-pack package or in die form. It is specified to operate across a temperature range of TA = -55 °C to +125 °C.