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特性

  • LP-HCSL outputs eliminate up to 16 terminated resistors
  • PCIe Gen 1–7 compliance
  • Drive both source-terminated and double-terminated loads
  • Selectable output slew rate via pin
  • Support both 85Ω and 100Ω output impedance versions
  • Open-drain LOS (Loss-Of-Signal) indication output
  • Power down tolerance (PDT)
  • Flexible startup sequencing (FSS)
  • Automatic clock parking (ACP)
  • Dedicated OE# pins to control group output
  • 4-wire Side-Band interface and device daisy-chaining
  • SMBus write protection features with 9 selectable addresses
  • 4mm × 4mm 28-VFQFPN package

描述

The RC19004 is a 4-output PCIe Gen7 buffer that is backward compatible with earlier PCIe generations. The RC19004 provides ultra-low additive jitter and reduced in-to-out delay performance for better design margin and incorporates several features for easier and more robust design.

产品参数

属性
Function Fanout Buffer
Architecture Common, SRIS, SRNS
App Jitter Compliance PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6, PCIe Gen7
Diff. Outputs 4
Diff. Output Signaling LP-HCSL
Output Impedance 85, 100
Diff. Inputs 1
Power Consumption Typ (mW) 125, 128
Supply Voltage (V) 3.3 - 3.3
Advanced Features Flexible Power Sequencing, Loss of Signal Indicator, Power Down Tolerant, Automatic Clock Parking, SMBus Write Protection

封装选项

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
VFQFPN 4.0 x 4.0 x 0.9 28 0.4

应用方框图

当前筛选条件

The RC family consists of PCIe Gen7 clock buffer and multiplexer solutions, providing the industry's smallest and most compact footprint.