RJU1C06JWS

AI 生成的摘要: Wire bonding damage occurs during the assembly of bare die or wafer IGBTs when improper bonding conditions cause defects such as misaligned bonds, chip surface scratches, or cracks. Excessive bonding stress can damage cells visibly or internally, affecting device performance and reliability. Evaluating bonding limits by adjusting power and force ensures optimal bonding strength without damage. Careful verification of bonding conditions improves yield and prevents failures like turn-off malfunctions caused by localized damage.

AI 生成的摘要: Gate drive conditions for IGBT and FRD devices focus on optimizing gate voltage, drive current, and gate resistor selection to ensure efficient switching performance and device protection. Recommended gate voltage is 15 V for turn-on, with off-state voltage set negative to prevent false turn-on. Increasing gate voltage reduces saturation voltage but shortens short-circuit withstand time, requiring balance. Drive current must be sufficient to charge/discharge the gate for fast switching. Gate resistor impacts switching time, loss, surge voltage, false turn-on, and ringing noise; selecting appropriate resistor values for turn-on and turn-off improves performance. Switching time increases with gate resistance, influencing device operation and efficiency.

AI 生成的摘要: The document outlines derating standards for Power MOSFETs and IGBTs, emphasizing temperature, humidity, voltage, current, and power limits to ensure device reliability. It discusses package type selection between hermetic sealed and plastic molded types, highlighting the advantages of surface-mount packages for miniaturization. It also details precautions for physical handling, including proper lead forming, cutting, and mounting techniques to prevent stress and damage during installation.

AI 生成的摘要: When connecting IGBTs in parallel, current unbalance occurs due to differences in VCE(sat) and parasitic resistances in the wiring and board. This unbalance affects device loss and switching behavior. Minimizing VCE(sat) variation by using devices from the same production lot and designing symmetrical layouts reduces unbalance. Gate driver emitter-sense wiring must also be symmetrical to ensure equal gate voltages. Temperature dependence of VCE(sat) influences current sharing, with positive temperature dependence improving stability.

AI 生成的摘要: The document defines absolute maximum ratings for IGBTs, including voltage, current, power dissipation, and temperature limits to ensure safe operation. It details electrical characteristics such as leakage currents, capacitances, switching times, and energy losses. Collector current and dissipation depend on temperature and voltage, with formulas provided for calculation. Users must operate IGBTs within specified maximum ratings to maintain reliability.