封装信息
| Pkg. Code | EWT |
| Pitch (mm) | 2.54 |
| Lead Count (#) | 28 |
| Pkg. Type | PDIP |
| Pkg. Dimensions (mm) | 35.56 x 13.97 x 4.06 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | Not Applicable |
| ECCN (US) | EAR99 |
| HTS (US) | 8542320051 |
| RoHS (X28HC64PIZ-12) | 下载 |
| Pb (Lead) Free | Yes |
产品属性
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Country of Assembly | Taiwan |
| Country of Wafer Fabrication | United States |
| Price (USD) | 1ku | 18.86309 |
| Access Time (ns) | 120 |
| Family Name | Byte Alterable EEPROM |
| Interface | Parallel |
| Lead Count (#) | 28 |
| Length (mm) | 35.6 |
| MOQ | 936 |
| Memory Capacity (kbit) | 64 |
| Organization (bit) | x 8 |
| Organization (kword) | 32 |
| Pb (Lead) Free | Yes |
| Pb Free Category | Pb-Free 100% Matte Tin Plate w/Anneal-e3 |
| Pitch (mm) | 2.5 |
| Pkg. Dimensions (mm) | 35.6 x 14.0 x 4.06 |
| Pkg. Type | PDIP |
| Supply Voltage (V) | 4.5 - 5.5 |
| Temp. Range | -40 to +85°C |
| Thickness (mm) | 4.06 |
| Width (mm) | 14 |
有关 X28HC64 的资源
描述
The X28HC64 is an 8k x 8 EEPROM, fabricated with Intersil’s proprietary, high performance, floating gate CMOS technology. Like all Intersil programmable nonvolatile memories, the X28HC64 is a 5V only device. It features the JEDEC approved pinout for byte-wide memories, compatible with industry standard RAMs. The X28HC64 supports a 64-byte page write operation, effectively providing a 32μs/byte write cycle, and enabling the entire memory to be typically written in 0. 25 seconds. The X28HC64 also features DATA Polling and Toggle Bit Polling, two methods providing early end of write detection. In addition, the X28HC64 includes a user-optional software data protection mode that further enhances Intersil’s hardware write protect capability. Intersil EEPROMs are designed and tested for applications requiring extended endurance. Inherent data retention is greater than 100 years.