概览
描述
The RC22504A is a small, low-power timing component designed to be placed immediately adjacent to a PHY, switch, ASIC or FPGA that requires several reference clocks with jitter performance less than 100fs (max). The RC22504A can act as a frequency synthesizer to locally generate the reference clock or as a DCO for frequency margining or OTN clock applications.
特性
- Jitter below 100fs RMS maximum (10Hz to 20MHz)
- PLL core consists of fractional-feedback Analog PLL (APLL)
- Operates from a 25MHz to 80MHz crystal or XO
- APLL frequency independent of input / crystal frequency
- Operates as a frequency synthesizer or Digitally Controlled Oscillator (DCO)
- DCO has tuning granularity of < 1ppb
- Programmable status output
- 4 differential / 8 LVCMOS outputs
- Any frequency from 10MHz to 1GHz (180MHz for LVCMOS)
- Programmable output buffer supports HCSL (DC-coupled), LVDS/LVPECL/CML (AC-coupled) or two LVCMOS
- Differential output swing is selectable: 400mV to 800mV
- Output clock phase individually adjustable in 100ps steps
- Output Enable input with programmable effect
- Supports up to 1MHz I2C or up to 20MHz SPI serial processor port
- Can configure itself automatically after reset via internal customer-definable One-Time Programmable (OTP) memory with up to four different configurations
- 4 × 4 mm 24-VFQFPN package
产品对比
应用
设计和开发
软件与工具
软件与工具
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Software type
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公司
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| 瑞萨电子集成电路工具箱 (RICBox) 借助瑞萨集成电路工具箱 (RICBox) 软件平台，客户可在连接到运行该软件的计算机时，将瑞萨设备配置到评估套件上。
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Software Package | 瑞萨电子 |
1 item
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开发板与套件
评估
RC32504A-EVK
有效
FemtoClock 2 评估套件
这是用于 RC32504A 和 RC22504A 使用点抖动衰减器和时钟发生器的评估套件。 该电路板装有一个 RC32504A 器件。 RC22504A 在功能上是 RC32504A 的子集，因此该板可用于评估两者中的任意一种或两种器件。 有关产品的更多详细信息，请参阅设备页面。
模型
ECAD 模块
点击产品选项表中的 CAD 模型链接，查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用，可直接在 SamacSys 请求该符号或模型。
产品选项
当前筛选条件
视频和培训
Lab on the Cloud Demo for FemtoClock®2 Ultra-Low Phase Noise Synthesizer and Jitter Attenuator
Demonstration of Renesas’ Lab on the Cloud virtual environment for FemtoClock®2 ultra-low phase noise synthesizer and jitter attenuator.
Video List
