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概览

描述

The 8T49N240-EVK is designed to help the customer evaluate the 8T49N240 Universal Frequency Translator (UFT 3G). When the board is connected to a PC running Timing Commander software™ through USB, the device can be configured and programmed through a graphical interface or through register settings, to generate frequencies with best-in-class performance.

特性

  • Board comes pre-populated with the 8T49N240
  • Four LVPECL outputs capable of generating almost any output frequency using the Timing Commander software™
  • SMA connectors for each output pair
  • Outputs terminate to 50 ohms on a scope
  • USB Cable

应用

文档

类型 文档标题 日期
手册 - 硬件 PDF 2.06 MB
应用说明 PDF 348 KB
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设计和开发

软件与工具

软件下载

类型 文档标题 日期
软件和工具 - 软件 登录后下载 ZIP 6.71 MB
软件和工具 - 软件 登录后下载 ZIP 18.01 MB
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模型

ECAD 模块

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Diagram of ECAD Models

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视频和培训

An overview of the IDT® 8T49N240, highly programmable clock generator and jitter attenuator IC. The device features less than 200fs of phase noise, providing valuable system design margin for 10Gbps interfaces in wireline and wireless communication networks. The additional phase noise margin eases system design constraints, allowing engineers to minimize bit error rates (BER) while lowering overall system costs.

The 8T49N240 is the latest member of IDT's third-generation Universal Frequency Translator (UFT™) family. It features the ability to produce virtually any common output frequency from virtually any input frequency. The highly flexible, high-performance clock generator and jitter attenuator is ideal for 10Gbps or multi-lane 40Gpbs / 100Gbps timing applications where 300fs of phase noise is typically the maximum acceptable amount allowed at the physical ports. The 200fs phase noise specification of the 8T49N240 provides ample noise margin, enabling engineers to simplify their clock tree designs and utilize lower cost PCBs.

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