概览
描述
The IDT ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera ) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204B full features sets.
特性
- SMA connector for clock and analog input signals
- JESD204B outputs up to 5 Gbps (HSMC connector)
- Optional HSMC to FMC adaptor board
- Single power supply (on-board regulators)
应用
设计和开发
模型
ECAD 模块
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