455A

AI 生成的摘要: The document details the differences between the 455A and 4559 Groups, focusing on performance, pin configuration, and control registers. Key distinctions include instruction count, ROM and RAM sizes, input/output port functions, timer configurations, LCD control circuits, oscillator frequencies, and interrupt control registers. Both groups share similar pin layouts and some timer and clock features, but differ in memory capacity, port functionalities, and interrupt handling.

AI 生成的摘要: 文档比较了455A群与4559群的功能差异，重点介绍了ROM和RAM容量、输入/输出端口配置、定时器规格、LCD驱动控制电路及振荡器频率。详细说明了管脚配置、控制寄存器、中断控制位和时钟系统设置。455A群具备软件可切换上拉和键唤醒功能、更多定时器计数源及低速振荡器，而4559群则无此功能。文档还涵盖了定时器模式、中断使能位和内部时钟控制的差异。

AI 生成的摘要: The document explains the use of the staircase key matrix with 455A-group microcomputers, focusing on operation using the Time-of-Day clock mode. It details the configuration and usage of related interrupt control registers V1 and V2, and timer control registers PA and W1. Instructions for setting and reading these registers are provided, alongside bit configurations and their functions, including timer interrupt enable bits and timer control bits relevant to key matrix operation.

AI 生成的摘要: The document explains how to use the carrier output of the 455A group microcomputers, detailing related registers and their bit configurations. It covers the Interrupt Control Registers V1 and I1, describing how to enable or disable interrupts and control input detection. It also explains Timer Control Registers W1 and W2, outlining timer start/stop functions, count sources, and PWM signal control. Instructions for writing and reading these registers are included.

AI 生成的摘要: The document explains how to use the power-down function of the 455A-group microcomputers, detailing the configuration and operation of related registers such as Interrupt Control Register V2, Interrupt Control Register I1, and LCD Control Registers L1 and L2. It describes bit settings for enabling or disabling interrupts, controlling input pins, and managing LCD power supply and segment functions. Instructions for writing and transferring register values are also provided.

AI 生成的摘要: The document explains the LCD display function for the 455A-group microcomputers, detailing the use of related control registers L1, L2, L3, and C1. It describes the bit configurations, instructions for writing to these registers, and the function of each bit, such as power supply control, duty cycle, bias selection, and pin function selection. The system uses a 32.768 kHz oscillator frequency in through mode without frequency division.

AI 生成的摘要: The document explains the use of timers in the 455A-group microcomputers, detailing timer settings and application examples such as buzzer output, event counting, external input timer start, fixed-cycle counting, and watchdog timer operation. It describes related interrupt control registers (V1, V2, I1) and their bit configurations, including enabling/disabling interrupts and input control. The Timer Control Register PA is also detailed, showing prescaler control and start/stop functions.

AI 生成的摘要: The document explains interrupt handling methods for the 455A group microcomputers, detailing the use of external and timer interrupts (Timer 1, 2, and 3). It describes the configuration and control of interrupt registers V1, V2, and I1, including enabling/disabling interrupts and input control settings. Additionally, it covers the Timer Control Register PA for timer start/stop control. The document provides bit-level register configurations and instructions for manipulating these registers.