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3.3V CMOS Dual 1 to 5 Clock Divider

封装信息

Pitch (mm) 0.65
Lead Count (#) 20
Pkg. Dimensions (mm) 7.2 x 5.3 x 1.73
Pkg. Code PYG20
Pkg. Type SSOP

环境和出口类别

Moisture Sensitivity Level (MSL) 1
Pb (Lead) Free Yes
ECCN (US) NLR
HTS (US) 8542390001

产品属性

Lead Count (#) 20
Carrier Type Tube
Moisture Sensitivity Level (MSL) 1
Qty. per Reel (#) 0
Qty. per Carrier (#) 64
Core Voltage (V) 3.3
Inputs (#) 2
Output Skew (ps) 270
Output Type LVCMOS
Output Voltage (V) 3.3
Package Area (mm²) 38.2
Pitch (mm) 0.65
Pkg. Dimensions (mm) 7.2 x 5.3 x 1.73
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range -40 to 85°C
Price (USD) | 1ku 1.95734
Function Buffer
Input Freq (MHz) 0 - 166
Input Type LVCMOS
Length (mm) 7.2
MOQ 256
Output Banks (#) 2
Output Freq Range (MHz) 0 - 166
Outputs (#) 10
Pkg. Type SSOP
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Thickness (mm) 1.73
Width (mm) 5.3
已发布 No

描述

The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs
and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs.
The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-to-point transmission line driving in applications such as address distribution, where one signal must be distributed to multiple receivers with low skew and high signal quality.