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概览

描述

The IDT5V2305 is a high performance, low skew clock buffer that operates up to 200MHz. One bank of five outputs provides low skew copies of CLK. Through the use of control pin G, the outputs of bank Y(0:4) can be placed in a low state regardless of CLK input. The device operates in 2.5V and 3.3V environments. The built-in output enable glitch suppression ensures a synchronized output enable sequence to distribute full period clock signals. The IDT5V2305 is characterized for operation from -40°C to +85°C.

特性

  • High performance 1:5 clock driver for general purpose applications
  • Operates up to 170MHz at VDD = 2.5V
  • Operates up to 200MHz at VDD = 3.3V
  • Pin-to-pin skew < 75ps at 3.3V operation
  • VDD range: 2.3V to 3.6V
  • Output enable glitch suppression
  • Available in TSSOP and VFQFPN packages

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应用

文档

设计和开发

模型

ECAD 模块

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类型 文档标题 日期
模型 - SPICE 登录后下载 ZIP 32 KB
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