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Low Phase Noise Clock Multiplier

封装信息

Lead Count (#) 16
Pkg. Code DCG16
Pitch (mm) 1.27
Pkg. Type SOIC
Pkg. Dimensions (mm) 9.9 x 3.9 x 1.5

环境和出口类别

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) NLR
HTS (US) 8542390000

产品属性

Lead Count (#) 16
Carrier Type Reel
Moisture Sensitivity Level (MSL) 3
Qty. per Reel (#) 2500
Qty. per Carrier (#) 0
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range 0 to 70°C
Accepts Spread Spec Input Yes
Advanced Features Accepts Spread Spec Input
C-C Jitter Max P-P (ps) 36
Core Voltage (V) 3.3
Feedback Input No
Input Freq (MHz) 25 - 25
Input Type Crystal, LVCMOS
Inputs (#) 1
Length (mm) 9.9
MOQ 2500
Output Banks (#) 1
Output Freq Range (MHz) 125 - 157.5
Output Skew (ps) 250
Output Type LVCMOS
Output Voltage (V) 2.5, 3.3
Outputs (#) 2
Package Area (mm²) 38.6
Period Jitter Max P-P (ps) 60.000
Period Jitter Typ P-P (ps) 30.000
Pitch (mm) 1.27
Pkg. Dimensions (mm) 9.9 x 3.9 x 1.5
Pkg. Type SOIC
Prog. Clock No
Reel Size (in) 13
Reference Output No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Spread Spectrum No
Supply Voltage (V) 3.3 - 3.3
Tape & Reel Yes
Thickness (mm) 1.5
Width (mm) 3.9
Xtal Freq (KHz) 25 - 25
Xtal Inputs (#) 1

描述

The IDT613 is a low cost, low phase noise, high-performance clock synthesizer for any applications that require low phase noise and low jitter. It is IDT's lowest phase noise multiplier. Using IDT's patented analog and digital Phase-Locked Loop (PLL) techniques, the chip can accept a 25 MHz crystal or clock input, and produces output clocks up to 157.5 MHz. The chip has separate power supplies for the clock outputs, allowing each output to be run at different voltages. It also allows the core of the chip to operate at 3.3 V, while the output clocks run at either 2.5 V or 3.3 V.