特性
- Dual-port allows simultaneous access of the same memory location
- RapidWrite mode simplifies high-speed consecutive write cycles
- Dual Chip Enables allow for depth expansion without external logic
- Easily expands data bus width to 72 bits or more using the Master/Slave select when cascading more than one device
- Busy and Interrupt flags
- On-chip port arbitration logic
- Full on-chip hardware support of semaphore signaling between ports
- Fully asynchronous operation from either port
- Separate byte controls for multiplexed bus and bus-matching compatibility
- Sleep mode inputs on both ports
- Includes JTAG functionality
- Single 2.5V (±100mV) power supply for core
- LVTTL-compatible, selectable 3.3V (±150mV) or 2.5V (±100mV) power supply for I/Os and control signals on each port
- Available in 256-ball BGA, 208-pin PQFP, and 208-ball fpBGA packages
- Industrial temperature range (–40°C to +85°C) is available
描述
The 70T659 is a high-speed 128K x 36 asynchronous dual-port static RAM designed to be used as a stand-alone dual-port RAM or as a combination Master/Slave dual-port RAM for 72-bit or more word systems, which would result in full-speed, error-free operation without the need for additional discrete logic. An automatic power-down feature controlled by the Chip Enables (either CE0 or CE1) permits the on-chip circuitry of each port to enter a very low standby power mode.
产品参数
| 属性 | 值 |
|---|---|
| Core Voltage (V) | 2.5 |
| Bus Width (bits) | 36 |
| Density (Kb) | 4608 |
| Pkg. Code | BF208 |
| Interface | Async |
| I/O Type | 2.5 V LVTTL, 3.3 V LVTTL |
| Access Time (ns) | 12 |
| Temp. Range (°C) | -40 to 85°C |
| Architecture | Dual-Port |
| Organization | 128K x 36 |
| Function | Busy, Interrupt, JTAG, Master, Semaphore, Slave, Sleep Mode |
封装选项
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| CABGA | 15.0 x 15.0 x 1.4 | 208 | 0.8 |