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3.3V 128Kx36 ZBT Synchronous Flow-Through SRAM with 3.3V I/O

封装信息

CAD 模型:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PKG100
Lead Count (#):100
Pkg. Dimensions (mm):20.0 x 14.0 x 1.4
Pitch (mm):0.65

环境和出口类别

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)3
ECCN (US)3A991.b.2.a
HTS (US)8542.32.0041

产品属性

Lead Count (#)100
Pb (Lead) FreeYes
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
ArchitectureZBT
Bus Width (bits)36
Core Voltage (V)3.3
Cycle Time (ns)85
Density (Kb)4608
I/O Voltage (V)2.5 - 2.5
Length (mm)20
MOQ144
Organization128K x 36
Output TypeFlowthrough
Package Area (mm²)280
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)20.0 x 14.0 x 1.4
Pkg. TypeTQFP
Qty. per Carrier (#)72
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)0 to 70°C
Thickness (mm)1.4
Width (mm)14
已发布No

描述

The 71V3557 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3557 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).