封装信息
| Lead Count (#) | 128 |
| Pkg. Code | PK128 |
| Pitch (mm) | 0.5 |
| Pkg. Type | TQFP |
| Pkg. Dimensions (mm) | 20.0 x 14.0 x 1.4 |
环境和出口类别
| Pb (Lead) Free | No |
| ECCN (US) | NLR |
| HTS (US) | 8542320071 |
| Moisture Sensitivity Level (MSL) | 3 |
产品属性
| Lead Count (#) | 128 |
| Pb (Lead) Free | No |
| Carrier Type | Tray |
| Architecture | Dual FIFO |
| Bus Width (bits) | 18 |
| Core Voltage (V) | 5 |
| Density (Kb) | 4 |
| Family Name | DualSync |
| I/O Frequency (MHz) | 1 - 1 |
| I/O Type | 5.0 V TTL |
| Interface | Synchronous |
| Length (mm) | 20 |
| MOQ | 216 |
| Moisture Sensitivity Level (MSL) | 3 |
| Organization | 256 x 18 |
| Package Area (mm²) | 280.0 |
| Pb Free Category | e0 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 20.0 x 14.0 x 1.4 |
| Pkg. Type | TQFP |
| Qty. per Carrier (#) | 72 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range | -40 to 85°C |
| Thickness (mm) | 1.4 |
| Width (mm) | 14 |
描述
The 72805 is a 256 x 18 First-In, First-Out memory with clocked read and write controls. It is functionally equivalent to two 72205 FIFOs in a single package with all associated control, data, and flag lines assigned to independent pins and would be applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. Each of the two FIFOs has an 18-bit input and output port. The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation.