封装信息
| Lead Count (#) | 64 |
| Pkg. Code | PN64 |
| Pitch (mm) | 0.8 |
| Pkg. Type | TQFP |
| Pkg. Dimensions (mm) | 14.0 x 14.0 x 1.4 |
环境和出口类别
| Pb (Lead) Free | No |
| ECCN (US) | NLR |
| HTS (US) | 8542320071 |
| Moisture Sensitivity Level (MSL) | 3 |
产品属性
| Lead Count (#) | 64 |
| Pb (Lead) Free | No |
| Carrier Type | Tray |
| Architecture | Uni-directional |
| Bus Width (bits) | 9 |
| Core Voltage (V) | 3.3 |
| Density (Kb) | 2048 |
| Family Name | SuperSync |
| I/O Frequency (MHz) | 1 - 1 |
| I/O Type | 3.3 V LVTTL |
| Interface | Synchronous |
| Length (mm) | 14 |
| MOQ | 45 |
| Moisture Sensitivity Level (MSL) | 3 |
| Organization | 256K x 9 |
| Package Area (mm²) | 196.0 |
| Pb Free Category | e0 |
| Pitch (mm) | 0.8 |
| Pkg. Dimensions (mm) | 14.0 x 14.0 x 1.4 |
| Pkg. Type | TQFP |
| Qty. per Carrier (#) | 90 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range | 0 to 70°C |
| Thickness (mm) | 1.4 |
| Width (mm) | 14 |
描述
The 72V2101 is a 256K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)