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概览

描述

The 72V3644 is a 3.3V version of the IDT723644. Two independent 1,024 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions.

特性

  • Clock frequencies up to 100 MHz (6.5ns access time)
  • Select IDT Standard timing or First Word Fall Through Timing
  • Programmable Almost-Empty and Almost-Full flags
  • each has three default offsets (8, 16 and 64)
  • Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits
  • Big- or Little-Endian format for word and byte bus sizes
  • Mailbox bypass registers for each FIFO
  • Free-running CLKA and CLKB may be asynchronous or coincident
  • Auto power down minimizes power dissipation
  • Available in 128-pin TQFP package
  • Industrial temperature range (–40C to +85C) is available

产品对比

应用

文档

设计和开发

模型

ECAD 模块

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Diagram of ECAD Models

模型

类型 文档标题 日期
模型 - SPICE 登录后下载 TAR 40 KB
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