封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | QSOP |
| Pkg. Code: | PCG20 |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 8.7 x 3.8 x 1.47 |
| Pitch (mm): | 0.64 |
环境和出口类别
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
产品属性
| Lead Count (#) | 20 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Bus Width (bits) | 8 |
| Core Voltage (V) | 5 |
| Function | Latch |
| Length (mm) | 8.7 |
| MOQ | 1100 |
| Moisture Sensitivity Level (MSL) | 1 |
| Package Area (mm²) | 33.1 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 8.7 x 3.8 x 1.47 |
| Pkg. Type | QSOP |
| Qty. per Carrier (#) | 55 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Speed Grade | A |
| Tape & Reel | No |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 1.47 |
| Width (mm) | 3.8 |
| 已发布 | No |
有关 74FCT573T 的资源
描述
The 74FCT573T is an Octal Transparent CMOS Latch built with 3-state outputs. This transparent latch is intended for bus-oriented applications. When Latch Enable (LE) is high, flip-flops appear transparent to the data; and when Latch Enable is low, the data that meets the set-up time is latched. The 74FCT573T CMOS latch operates at -40C to +85C. (For Mil version, see 54FCT573T).