跳转到主要内容
Low Skew,1-to-9 Differential-to-3.3V LVPECL Fanout Buffer

封装信息

CAD 模型: View CAD Model
Pkg. Type: TQFP
Pkg. Code: PRG32
Lead Count (#): 32
Pkg. Dimensions (mm): 7.0 x 7.0 x 1.4
Pitch (mm): 0.8

环境和出口类别

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) EAR99
HTS (US) 8542.39.0090

产品属性

Lead Count (#) 32
Carrier Type Tray
Moisture Sensitivity Level (MSL) 3
Qty. per Reel (#) 0
Qty. per Carrier (#) 250
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range (°C) 0 to 70°C
Additive Phase Jitter Typ RMS (fs) 170
Additive Phase Jitter Typ RMS (ps) 0.17
Core Voltage (V) 3.3
Function Buffer, Multiplexer
Input Freq (MHz) 500
Input Type CML, HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#) 2
Length (mm) 7
MOQ 250
Output Banks (#) 1
Output Freq Range (MHz) 500
Output Skew (ps) 50
Output Type LVPECL
Output Voltage (V) 3.3
Outputs (#) 9
Package Area (mm²) 49
Pitch (mm) 0.8
Pkg. Dimensions (mm) 7.0 x 7.0 x 1.4
Pkg. Type TQFP
Price (USD) $27.18
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel No
Thickness (mm) 1.4
Width (mm) 7
已发布 No

描述

The 8531-01 is a low skew, high performance 1-to-9 Differential-to-3.3V LVPECL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8531-01 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output skew and part-to-part skew characteristics make the 8531-01 ideal for high performance workstation and server applications.