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瑞萨电子 (Renesas Electronics Corporation)
4:1 Or 2:1 Differential-to-3.3V LVPECL/ECL Clock Multiplexer

封装信息

Pkg. Type:TSSOP
Pkg. Code:PGG20
Lead Count (#):20
Pkg. Dimensions (mm):6.5 x 4.4 x 1.0
Pitch (mm):0.65

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)20
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)74
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Core Voltage (V)3.3
FunctionMultiplexer
Input Freq (MHz)750
Input TypeHCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)4
Length (mm)6.5
MOQ74
Output Banks (#)1
Output Freq Range (MHz)750
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)1
Package Area (mm²)28.6
Pitch (mm)0.65
Pkg. Dimensions (mm)6.5 x 4.4 x 1.0
Pkg. TypeTSSOP
Product CategoryClock Buffers & Drivers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1
Width (mm)4.4

描述

The 85357I-01 is a 4:1 or 2:1 Differential-to-3.3V LVPECL / ECL clock multiplexer which can operate up to 750MHz. The 85357I-01 has 4 selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The device can operate using a 3.3V LVPECL (VEE = 0V, VCC = 3.135V to 3.465V) or 3.3V ECL (VCC = 0V, VEE = -3.135V to -3.465V). The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the internal resistor) will transform the device into a 2:1 multiplexer. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 00 selects CLK0, nCLK0).