特性
- Two differential LVPECL/ECL bank outputs
- Two differential LVPECL clock input pairs
- PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
- Output frequency: 2GHz (maximum)
- Translates any single-ended input signal to LVPECL levels with resistor bias on nPCLKx input
- Bank skew: 60ps (maximum)
- Part-to-part skew: 190ps (maximum)
- Propagation delay: 460ps (maximum)
- Additive phase jitter, RMS: 0.05ps (typical)
- LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V
- ECL mode operating voltage supply range: VCC = 0V, VEE = -3.8V to -2.375V
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
描述
The 853S013I is a low skew, high performance dual 1-to-3 Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer. The 853S013I operates with a positive or negative power supply at 2.5V or 3.3V. Guaranteed output and part-to-part skew characteristics make the 853S013I ideal for those clock distribution applications demanding well defined performance and repeatability.