特性
- Eight differential 3.3V LVPECL/ECL outputs
- Two selectable differential input pairs
- PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
- Maximum output frequency: 2GHz
- Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on nPCLKx input
- Output skew: 20ps (typical)
- Propagation delay: 825ps (typical)
- Additive phase jitter, RMS: 0.14ps (typical)
- LVPECL mode operating voltage supply range: VCC = 3.0V to 3.8V, VEE = 0V
- ECL mode operating voltage supply range: VCC = 0V, VEE = -3.0V to -3.8V
- -40°C to 85°C ambient operating temperature
- Available lead-free (RoHS 6) package
853S310I - Block Diagram
描述
The 853S310I is a low skew, high performance 1-to-8 Differential-to-3.3V LVPECL/ECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept LVPECL, LVDS, CML and SSTL differential input levels. The 853S310I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S310I ideal for those clock distribution applications demanding well defined performance and repeatability.
