特性
- Fully integrated PLL
- Four LVCMOS/LVTTL outputs, 15? typical output impedance
- Selectable crystal oscillator interface or LVCMOS/LVTTL REF_IN clock input
- Maximum output frequency: 166.67MHz
- Maximum crystal input frequency: 38MHz
- Maximum REF_IN input frequency: 41.67MHz
- Individual banks with selectable output dividers for generating 33.333MHz, 66.66MHz, 100MHz and 133.333MHz
- Separate feedback control for generating PCI / PCI-X frequencies from a 16.66MHz or 20MHz crystal, or 25MHz or 33.33MHz reference frequency
- VCO range: 250MHz to 500MHz
- Cycle-to-cycle jitter: 120ps (maximum)
- Period jitter, RMS: 20ps (maximum)
- Output skew: 65ps (maximum)
- Static phase offset: 160ps ± 160ps
- Voltage Supply Modes: V DD /V DDA DDO 3.3/3.3/3.3 3.3/3.3/2.5
- -40°C to 85°C ambient operating temperature
- Available in both standard (RoHS 5 and lead-free (RoHS 6) packages
描述
The 87604I is a 1:4 PCI/PCI-X Clock Generator. The 87604I has a selectable REF_IN or crystal input. The REF_IN input accepts LVCMOS or LVTTL input levels. The 87604I has a fully integrated PLL along with frequency configurable clock and feedback outputs for multiplying and regenerating clocks with "zero delay". The PLL's VCO has an operating range of 250MHz - 500MHz, allowing this device to be used in a variety of general purpose clocking applications. For PCI/PCI-X applications in particular, the VCO frequency should be set to 400MHz. This can be accomplished by supplying 33.33MHz, 25MHz, 20MHz, or 16.66MHz on the reference clock or crystal input and by selecting ÷12, ÷16, ÷20, or ÷24, respectively as the feedback divide value. The divider on the output bank can then be configured to generate 33.33MHz (÷12), 66.66MHz (÷6), 100MHz (÷4), or 133.33MHz (÷3). The 87604I is characterized to operate with its core supply at 3.3V and the bank supply at 3.3V or 2.5V. The 87604I is packaged in a small 6.1mm x 9.7mm TSSOP body, making it ideal for use in space-constrained applications.
