封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | SSOP |
| Pkg. Code: | PVG48 |
| Lead Count (#): | 48 |
| Pkg. Dimensions (mm): | 15.9 x 7.5 x 2.3 |
| Pitch (mm): | 0.64 |
环境和出口类别
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | SSOP |
| Lead Count (#) | 48 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Accepts Spread Spec Input | No |
| C-C Jitter Max P-P (ps) | 150 |
| Chipset Manufacturer | Intel |
| Chipset Name | 845 |
| Clock Spec. | CK408 |
| Core Voltage (V) | 3.3 |
| Die Form | No |
| Diff. Output Signaling | HCSL |
| Input Freq (MHz) | 14.318 - 200 |
| Length (mm) | 15.9 |
| MOQ | 120 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Freq Range (MHz) | 14.318 - 200 |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 19 |
| Package Area (mm²) | 119.3 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 15.9 x 7.5 x 2.3 |
| Qty. per Carrier (#) | 30 |
| Qty. per Reel (#) | 0 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 2.3 |
| Width (mm) | 7.5 |
| Xtal Freq (KHz) | 14.3182 - 14.3182 |
| Xtal Inputs (#) | 1 |
有关 950220 的资源
描述
The 950220 is a single chip clock solution for desktop designs using the Intel 845 chipset with PC133 or DDR memory. It provides all necessary clock signals for such a system. The 950220 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.