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封装信息

Lead Count (#) 40
Pkg. Code NDG40
Pitch (mm) 0.4
Pkg. Type VFQFPN
Pkg. Dimensions (mm) 5.0 x 5.0 x 0.9

环境和出口类别

Moisture Sensitivity Level (MSL) 3
Pb (Lead) Free Yes
ECCN (US) NLR
HTS (US) 8542390060

产品属性

Lead Count (#) 40
Carrier Type Tray
Moisture Sensitivity Level (MSL) 3
App Jitter Compliance PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6
Qty. per Reel (#) 0
Qty. per Carrier (#) 490
Pb (Lead) Free Yes
Pb Free Category e3 Sn
Temp. Range -40 to 85°C
Country of Assembly Taiwan
Country of Wafer Fabrication Taiwan
Price (USD) | 1ku 2.11218
Accepts Spread Spec Input Yes
Additive Phase Jitter Typ RMS (fs) 300
Additive Phase Jitter Typ RMS (ps) 0.3
Advanced Features Multiple SMBus addresses
Architecture Common, SRNS, SRIS
C-C Jitter Max P-P (ps) 50
Core Voltage (V) 3.3
Diff. Input Signaling HCSL
Diff. Inputs 1
Diff. Output Signaling LP-HCSL
Diff. Outputs 6
Diff. Termination Resistors 0
Feedback Input No
Function Zero Delay Buffer
Input Freq (MHz) 1 - 200
Input Type HCSL
Inputs (#) 1
Length (mm) 5
Longevity 2040 4月
MOQ 490
Output Banks (#) 1
Output Freq Range (MHz) 1 - 200
Output Impedance 85
Output Skew (ps) 50
Output Type LP-HCSL
Output Voltage (V) 0.8
Outputs (#) 6
PLL Yes
Package Area (mm²) 25.0
Pitch (mm) 0.4
Pkg. Dimensions (mm) 5.0 x 5.0 x 0.9
Pkg. Type VFQFPN
Power Consumption Typ (mW) 149
Prog. Clock No
Reference Output No
Spread Spectrum Yes
Supply Voltage (V) 3.3 - 3.3
Tape & Reel No
Thickness (mm) 0.9
Width (mm) 5

描述

The 9DBL0651 6-output 3.3V PCIe zero-delay/fanout buffer supports PCIe Gen 1 through Gen 6 and both Common and Independent Reference Clock architectures.

For information regarding evaluation boards and material, please contact your local sales representative.