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4 output PCIe PLL with spread injection

封装信息

CAD 模型: View CAD Model
Pkg. Type: TSSOP
Pkg. Code: PGG28
Lead Count (#): 28
Pkg. Dimensions (mm): 9.7 x 4.4 x 1.0
Pitch (mm): 0.65

环境和出口类别

Pb (Lead) Free Yes
Moisture Sensitivity Level (MSL) 1
ECCN (US)
HTS (US)

产品属性

Pkg. Type TSSOP
Lead Count (#) 28
Pb (Lead) Free Yes
Carrier Type Tube
Accepts Spread Spec Input No
Additive Phase Jitter Typ P-P (ps) 10
Additive Phase Jitter Typ RMS (fs) 0.5
Advanced Features HW PLL mode control, Spread Injection
App Jitter Compliance PCIe Gen1, PCIe Gen2
Architecture Common
C-C Jitter Max P-P (ps) 50
Core Voltage (V) 3.3
Diff. Input Signaling HCSL
Diff. Inputs 1
Diff. Output Signaling HCSL
Diff. Outputs 4
Diff. Termination Resistors 16
Input Freq (MHz) 90
Length (mm) 9.7
MOQ 150
Moisture Sensitivity Level (MSL) 1
Output Banks (#) 1
Output Freq Range (MHz) 50 - 400
Output Skew (ps) 50
Output Type HCSL
Output Voltage (V) 0.7
Outputs (#) 4
PLL Yes
Package Area (mm²) 42.7
Pb Free Category e3 Sn
Phase Jitter Max RMS (ps) 3.1
Pitch (mm) 0.65
Pkg. Dimensions (mm) 9.7 x 4.4 x 1.0
Power Consumption Typ (mW) 363
Qty. per Carrier (#) 50
Qty. per Reel (#) 0
Reference Output No
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Spread Spectrum Yes
Supply Voltage (V) 3.3 - 3.3
Tape & Reel No
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1
Width (mm) 4.4
已发布 No

描述

The 9DS400 is a 4-output PCIe PLL with the ability to inject spread spectrum onto the incoming differential clock, while maintaining good phase noise.