瑞萨电子 (Renesas Electronics Corporation)
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3D illustration featuring top and bottom views of TSSOP IC chip package with 64 lead count.

9ERS3165BGLF

过时
Embedded 56-pin Industrial Temperature Range CK505 Compatible Clock
9ERS3165 Datasheet有关 9ERS3165B 的所有信息

封装信息

CAD 模型:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PAG64
Lead Count (#):64
Pkg. Dimensions (mm):17.0 x 6.1 x 1.0
Pitch (mm):0.5

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Pkg. TypeTSSOP
Lead Count (#)64
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)28
Package Area (mm²)103.7
Pkg. Dimensions (mm)17.0 x 6.1 x 1.0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
100M Non-SSC Outputs1
100M SSC Outputs12
25M Outputs1
Advanced FeaturesCPU 100M-400M output pair(s), SRC/DOT96 output pair(s), SRC/SE output pair(s), 14.318M output(s), 48M output(s), Integrated VREG
App Jitter CompliancePCIe Gen1, PCIe Gen2
C-C Jitter Max P-P (ps)85
Chipset ManufacturerIntel
Clock Spec.CK505 Derivative
Core Voltage (V)3.3
Die FormNo
Diff. Output SignalingHCSL
Diff. Termination Resistors0
Freq. Accuracy Init. (± PPM)100
FunctionClock Generator
Input Freq (MHz)14.3182 - 14.3182
Input TypeCrystal
Length (mm)17
MOQ2016
Output Freq Range (MHz)14.32 - 400
Output Skew (ps)100
Output Voltage (V)3.3V, 0.7V
PCI 33.33M Outputs (#)5
PCIe GenerationGen1, Gen2
Phase Jitter Max RMS (ps)3.1
Pitch (mm)0.5
Power Consumption Typ (mW)383
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumYes
Supply Voltage (V)1.05 - 3.3
Tape & ReelNo
Thickness (mm)1
Width (mm)6.1
Xtal Freq (MHz)14.32 - 14.32
Xtal Inputs (#)1
已发布No

描述

Industrial temperature CK505 compatible clock for embedded systems.
有关 9ERS3165B 的所有信息