特性
- Low skew, fanout buffer
- I2C for functional and output control
- Single bank 1-6 differential clock distribution
- 1 pair of differential feedback pins for input to output
- synchronizationSupports up to 2 DDR DIMMs
- 400MHz (DDRII 800) output frequency support
- Programmable skew through SMBus
- Frequency defect control through SMBus
- Individual output control programmable through SMBus
描述
DDR II fanout buffer for VIA Chipset
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