特性
- High performance, low jitter zero delay buffer
- I2C for functional and output control
- Dual bank 1-6 differential clock distribution
- 2 separate feedback in & out for input to output
- synchronization for each bankSupports up to 4 DDR DIMMs
- Supports up to DDRII - 1066MHz
- Supports up to DDRIII (1.8V core) - 1333MHz
描述
Dual Channel DDRII/III Zero Delay Buffer
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