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注意 - 建议使用以下设备作为替代品:
9ZXL1251E - 12-Output DB1200ZL PCIe Clock Clock Buffer
Pin-to-pin with improved performance

概览

描述

The IDT9ZX21201 is a 12-output DB1200Z suitable for PCI Express® Gen3 or QPI applications. The part is backwards compatible to PCIe Gen1 and Gen2. A fixed external feedback maintains low drift for critical QPI applications. In bypass mode, the IDT9ZX21201 can provide outputs up to 150MHz.

特性

  • Cycle-to-cycle jitter <50ps
  • Output-to-output skew < 65 ps
  • Input-to-output delay variation <50ps
  • PCIe Gen3 phase jitter < 1.0ps RMS
  • QPI 9.6GT/s 12UI phase jitter < 0.2ps RMS
  • Space-saving 64-pin packages
  • Fixed feedback path/ 0ps input-to-output delay
  • 9 Selectable SMBus Addresses/Multiple devices can share the same SMBus Segment
  • 12 OE# pins/Hardware control of each output
  • PLL or bypass mode/PLL can dejitter incoming clock
  • 100MHz or 133MHz PLL mode operation/supports PCIe and QPI applications
  • Selectable PLL bandwidth/minimizes jitter peaking in downstream PLL's
  • Spread Spectrum Compatible/tracks spreading input clock for low EMI
  • Software control of PLL Bandwidth and Bypass Settings/ PLL can dejitter incoming clock (B Rev only)

产品对比

应用

文档

设计和开发

模型

ECAD 模块

点击产品选项表中的 CAD 模型链接,查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用,可直接在 SamacSys 请求该符号或模型。

Diagram of ECAD Models

模型

类型 文档标题 日期
模型 - IBIS ZIP 12 KB
模型 - IBIS ZIP 12 KB
2 items

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