封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NDG40 |
| Lead Count (#): | 40 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.9 |
| Pitch (mm): | 0.4 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
产品属性
| Lead Count (#) | 40 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 490 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | TAIWAN |
| Accepts Spread Spec Input | Yes |
| Advanced Features | HW PLL mode control |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, QPI |
| Chipset Manufacturer | Intel |
| Chipset Name | C600, Patsburg, Wellsburg, Lewisburg |
| Clock Spec. | DB800ZL v1.1 Derivative |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | LP-HCSL |
| Diff. Outputs | 6 |
| Function | Buffer |
| Input Freq (MHz) | 33 - 150 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 5 |
| MOQ | 490 |
| Output Banks (#) | 1 |
| Output Enable (OE) Pins | 6 |
| Output Freq Range (MHz) | 25 - 150 |
| Output Type | LP-HCSL |
| Output Voltage (V) | 0.7V |
| Outputs (#) | 6 |
| Package Area (mm²) | 25 |
| Pitch (mm) | 0.4 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 445 |
| Price (USD) | $2.71327 |
| Product Category | Processor Clock Buffers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| Width (mm) | 5 |
| 已发布 | No |
有关 9ZXL0651 的资源
描述
The 9ZXL0651 is a low-power 6-output differential buffer that meets all the performance requirements of the Intel DB1200Z specification. It consumes 50% less power than standard HCSL devices and has internal terminations to allow direct connection to 85Ω transmission lines. It is suitable for PCI Express Gen 1/2/3 or QPI/UPI applications and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications.