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特性

  • SMBus write lock feature; increases system security
  • PCIe Gen 1–5 compliance
  • LP-HCSL outputs with 85Ω Zout; eliminate 32 resistors, save 64mm² of area (0852E)
  • 8 OE# pins; hardware control of each output
  • Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • 100MHz and 133.33MHz PLL Mode; UPI and legacy QPI support
  • 6mm × 6mm 48-VFQFPN package; small board footprint

描述

The 9ZXL0852E is a second-generation, enhanced-performance DB800ZL differential buffer. The part is pin-compatible with the 9ZXL0851A while offering a much-improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications. The 9ZXL0852E has an SMBus Write Lockout pin for increased device and system security.

产品参数

属性
Temp. Range (°C)-40 to 85°C

封装选项

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
VFQFPN6.0 x 6.0 x 0.9480.4

应用

  • Servers/High-performance Computing
  • nVME Storage
  • Networking
  • Accelerators
  • Industrial Control

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